Research interests
My current research and development interests gravitate around Big Data technologies, focusing on Spark and Delta Lake. I also follow GenAI and MLOps.
Previously, my research at Inria focused on execution-trace storage, analysis and visualization. Execution traces are a powerful instrument for understanding complex application behavior, to profile or debug. Dealing with traces, however, is not an easy task, since you have to organize a huge amount of data and extract meaningful information from them. Framesoc, the framework I designed and implemented, proposes some solutions to these issues.
Before, I mainly focused on 4G telecommunication networks (LTE Advanced). These networks offer a wide range of transmission techniques based on multiple antennas, thus needing smart algorithms to choose the best transmission mode, scheduling user data. In my work I proposed an innovative scheduling algorithm (patented) supporting multiple antennas technology and quality of service.
Publications
A list of my publications is available on my Google Scholar page.
Patents
- LTE Scheduling, Europe PCT/EP2011/053225, Filed March 3, 2011.
Some presentations and posters
- Drastically Reducing Processing Costs with Delta Lake, Databricks Data & AI Summit 2024, San Francisco, USA. [conference site]
- MLflow and Beyond, SophiaConf 2021, Sophia Antipolis, France. [conference site] [video]
- What happened to my application? The Framesoc answer, EclipseCon 2015 demo, Touluse, France. [conference site]
- Framesoc Code Review, Inria, Grenoble, France, 2015. [slides]
- Framesoc Hands-On Tutorial, HiePACS/Runtime Seminary, Inria, Bordeaux, France, 2015. [slides]
- Framesoc Changes and Enhancements, SET2.0 kickoff meeting, Inria, Grenoble, France, 2014. [slides]
- The Framesoc Software Architecture for Multiple-View Trace Data Analysis, EICS 2014, Rome, Italy. [poster]
- Trace management and analysis with Framesoc, MESCAL Seminar 2014, Autrans, France. [slides]
- Trace Management and Analysis for Embedded Systems, MCSoC 2013, Tokyo, Japan. [slides]
- SoC-TRACE: Handling the Challenge of Embedded Software Design and Optimization, Middleware 2012, Montreal, Canada. [poster]